发明名称 DATA PROCESSOR
摘要 PURPOSE:To make efficient the data processing of an unpack form, by processing the zone and digit part of a byte data with lach of two sets of registers. CONSTITUTION:The hexadecimal number, e.g., 3 corresponding to the zone loaded to the logical operation circuit 9 is stored in the zone register 7Z of the register 4. Then, the data of the form of zone Zn and digit Dn in one byte unit is read out from the main memory 1 with the access request of CPU3. Further, the gate is controlled with the set of register stored and written in FF in advance, and digits are written in and stored in the digit section register D with the switching signal 12D and clock signal 13D. Thus, the data is normalized with registers 7Z, 7D and the data is written in the memory 1 until it reaches the designated length. The data processing time of zone section is reduced with the system processing the zone and digit through the use of registers of two sets and 4-bit, allowing to efficiently make the data processing of the unpack form.
申请公布号 JPS56137570(A) 申请公布日期 1981.10.27
申请号 JP19800040223 申请日期 1980.03.31
申请人 发明人
分类号 H03M5/20;G06F9/302;G06F12/00;G06F12/04 主分类号 H03M5/20
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