发明名称 AM RECEIVER
摘要 PURPOSE:To prevent beat disturbance, etc., by holding the total gain of a PLL circuit constant by using a variable gain controlling circuit. CONSTITUTION:The output signal of IF amplifying circuit 5 is supplied to phase comparator 8a constituting PLL circuit 8 via variable gain controlling circuit 11. The output signal of voltage-controlled oscillator 8c is supplied to comparator 8a and also to multiplying circuit 6 via 90 deg. phase shifting circuit 9. A detection signal appearing at the output side of this circuit 6 is supplied to voice signal output terminal 10 and also supplied to level detecting circuit 13. The output signal of this circuit 13 is supplied as a gain signal to high-frequency amplifying circuit 2 and circuit 5 to control their gains, and the output signal of this circuit 13 is supplied as a gain control signal to circuit 11 via DC amplifying circuit 14 to control the gain of circuit 11 according to the input signal level. Consequently, circuit 8 can operate stably and the generation of a higher harmonic signal can be suppressed low, so that beat disturbance, etc., are prevented.
申请公布号 JPS56136042(A) 申请公布日期 1981.10.23
申请号 JP19800039440 申请日期 1980.03.27
申请人 SONY CORP 发明人 SATOU TERUO
分类号 H03J7/28;H03D1/22;H04B1/26 主分类号 H03J7/28
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