| 摘要 |
PURPOSE:To obtain a miniature, lightweight device by reducing the scale of an additional circuit required for key input, by using in common a direct memory access circuit for writing a received signal into a memory. CONSTITUTION:At positions of the most significant bits of memory 2, signal bits S0, S1 and S2 are written corresponding to values ''0'', ''1'' and ''2'' of frame address 29. Processor unit 1, therefore, recognizes all signal bits from a party-side communication device only by attaining access to the memory once in the period of a frame address. Decoder 6 receives address 29 and outputs a scanning pulse. When key switches 23-28 are off, inputs to gates 10 and 11 are at the high level. As switch 25 is turned on, gate 11 is held at the low level and data is written in memory 2 by direct memory access. Therefore, since key information is written in memory 2, processor unit 1 detects the switch by the address and bit position of the memory where the contents are ''0''. |
