发明名称 MOS SEMICONDUCTOR DEVICE
摘要 PURPOSE:To protect FET against a high voltage by a method wherein a base plate and conductive layer of high concentration are arranged with being adjacent to or overlapped on a source drain, and a junction proofvoltage between the former layer and a source, drain is made lower than a breakage voltage of source drain when the gate and the source show the same potential value. CONSTITUTION:Opening is made in SiO2 on P type Si base plate 1 to form P<+> layer 4, further SiO2 films 5-7 are formed except SiO2 maks, and N type source 8 and the drain 9 are dispersed at the opening. Then, oxide thick films 10, 11 are made and a gate electrode 13 is formed on a gate oxidation film 12. A plurality of P<+> layers 4 are made in a form of island to decrease a junction durable voltage between the source and the drain. With this arrangement, the structure of the semiconductor is not complicated and shows an extreme effective operation against the electrostatic breakage is hard to be occured even if a gate oxidation film is made to be thin.
申请公布号 JPS56134773(A) 申请公布日期 1981.10.21
申请号 JP19800038369 申请日期 1980.03.26
申请人 NIPPON ELECTRIC CO 发明人 TOKODA SABUROU
分类号 H03F1/52;H01L27/06;H01L29/06;H01L29/08;H01L29/78;H02H7/20;H03F1/42 主分类号 H03F1/52
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