DIGITAL LEVEL DIFFERENCE DETECTING CIRCUIT

摘要

PURPOSE:To simplify the cinstitution of a digital level difference detecting circuit by omitting a circuit with the same function by finding maximum values of two input signals within a constant time and then by determining which signal level is greater by making a comparison between the both. CONSTITUTION:A series digital signal of couples of complements of ''2'' is inputted to absolute-value circuit A to find the absolute value of the input signal and every time this signal is inputted, it is compared by comparator 25 of maximum detecting circuit B with the contents of delaying register 30 to detect a maximum value within a certain time. The output of register 30 is delayed by shift register 27 and maximum values of two signals in a couple whose level difference is to be detected are sent to comparing circuit C simultaneously. Comparator 31 of circuit C receives a couple of maximum value signals to determine which is greater and then sends a selective signal to selector 33. The input to selector 33 is that obtained by delaying maximum value signals through shift registers 27 and 32 until the results of comparator 31 is obtained, and selector 33 generates a large signal as output S and a small signal as output T.