| 摘要 |
PURPOSE:To contrive the improvement of a noise allowance degree for a supply power source of a digital circuit by a method wherein a capacity is formed in the IC between an electrode feeding a reference potential and an electrode feeding an another potential. CONSTITUTION:When the capacity 13 is connected in parallel between the reference electrode 12 grounded and the supply electrode 11 of the power source VDD and a parasitic resistor 14 is formed in series to the electrode 11 to form the integrated circuit, a noise amplitude is reduced even the noise enters into the supply power source VDD. The larger the capacity and the resistance value are, the more effective they are. The capacity 13 is easy to be formed in MOSIC and for this reason, the chip becomes not large. Generally, the capacity 13 is formed using a gate oxide film 17 between a substrate 15 and an Al wiring 16 with the substrate 15 as the reference potential. The resistor 14 is formed by a poly-Si layer. The power source VDD is supplied from a part (a) and fed from a part (b) to an internal logic circuit. With this construction, the noise is completely removed and the noise allowance degree of the digital circuit increases. |
