发明名称 CLOCK GENERATOR OF CHARACTER MULTIPLEX BROADCAST RECEIVER
摘要 PURPOSE:To obtain a relatively stable clock even if S/N deteriorates in a weak electric field range, by obtaining the clock by using a synchronizing pulse at the start position of an information signal. CONSTITUTION:Through burst jumping circuit 101 and AND gate 102, multiple gate signal A is made into gate signal C, which is applied to gate 103 to extract character information signal E from video signal I. Then, signal E is applied to NAND gate 104 together with output G of 8-pulse counter 105 which counts synchronizing pulses F outputted by NAND gate 104. Further, gate signal C and output G are applied to AND gate 107 to obtain pulse signal H. Then, when synchronizing pulse F is supplied to the base of transistor 113 together with pulse signal H, the clock generating means consisting of quartz oscillator 119, etc., generates an output of a frequency phase-locked to synchronizing pulse F. Then, writing to a memory is performed with a write clock.
申请公布号 JPS56134886(A) 申请公布日期 1981.10.21
申请号 JP19800038748 申请日期 1980.03.25
申请人 SHARP KK 发明人 TAKEMURA KINYA;KUKI MASARU;FUKUZAKI KAZUHIRO
分类号 H04N7/083;H04N7/035;H04N7/087;H04N7/088 主分类号 H04N7/083
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