| 摘要 |
In a computer control system a central processor unit (CPU) is provided as a primary control center. A data bus interface controller is connected to interface between the CPU and a serial data communication bus. The interface control unit controls the traffic on the data bus as well as interfacing the format between serial data on the data bus and the parallel data receivable by the CPU. A plurality of process interface units are connected to the serial data bus. Each of these process interface units (PIU) has a plurality of process input/output devices connected thereto and controlled thereby. The PIU's exercise a significant amount of control capability including having an internal microprocessor unit. By performing many of the functions heretofore provided by the central processor unit, the PIU significantly reduces the amount of data which must be transmitted via the serial data bus to the CPU. By requiring the data bus only for reporting of change signals, or data requested by the CPU, further economies in the use of the data bus are effected. By thus reducing the amount of data that must be transmitted on the data bus, more efficient use is made of both the CPU and the communication bus. The PIU includes facilities for scanning all of the input/output devices associated therewith; manipulating the gathered data to perform such operations as offset correction, gain optimization, linearization where needed, sequence of events tabulation, reasonableness testing, digital smoothing, process limit testing, normalization, scan frequency controlling and cold junction compensation where needed; the storing of the results in local memory for transmission to the CPU through the bus interface control unit. It has the capacity to request access to the communication bus when required. When access to the bus is acquired by the CPU, gathered data may be transmitted in block form or on a word-by-word basis as required.
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