发明名称 SEMICONDUCTOR GATE ARRAY CIRCUIT
摘要 PURPOSE:To raise the degree of integration of a logical circuit in the gate array, by constituting so as not to generate a transistor which is left unused. CONSTITUTION:Two pairs of transfer gates 25, 27 are formed by a positive conductive type MOSFETs 31 and 33, and a negative conductive type MOSFETs 32 and 34, the source-electrodes making pairs with them are separately coupled respectively, are connected to the first and second input lines 10, 11, and these drain-electrodes are coupled in a lump and are connected to the output line 14. The gate of FET31 or 32 of the transfer gate 25, and the gate of FET34 or 33 of the transfer gate 27 are coupled respectively, and they are connected to the input line 12 or 13 to which the third input is applied, but since it is necessary that the input lines 12 and 13 provide a reverse logical input to each other, as for a basic cell, the inverter is constituted of one pair of positive and negative conductive type MOSFETs 35 and 36, and thereafter, the output line 16 and the input line 13, and also the input lines 15 and 12 are connected in advance, respectively.
申请公布号 JPS56132823(A) 申请公布日期 1981.10.17
申请号 JP19800036456 申请日期 1980.03.21
申请人 NIPPON ELECTRIC CO 发明人 HIRAYAMA TETSUROU
分类号 H01L27/118;H01L21/82;H03K19/0948;H03K19/173 主分类号 H01L27/118
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