发明名称 TIME CONTROL CIRCUIT FOR PATTERN
摘要 PURPOSE:To enable time control for a plurality of load control patterns, by outputting the output signal at the start and stop end of the time limit output from one time set means and providing the pattern switch driving circuit controlling two sets of pattern switches. CONSTITUTION:The output waveform of a timer circuit 1 is inverted at a transistor TRQ1, integrated 19, differentiated 23, and TRQ3 is on with this output signal to drive the relay Ry2 and to obtain the signal for start end A of the time limit output. Then, the output waveform of the inverter 20 is further inverted at an inverter 21, differentiated 22, and TRQ2 is on with the output signal to drive the relay Ry1, and the contact X of the pattern switch 4 is on to obtain the signal for the stop end B of oscillation output.
申请公布号 JPS56129908(A) 申请公布日期 1981.10.12
申请号 JP19800033221 申请日期 1980.03.15
申请人 MATSUSHITA ELECTRIC WORKS LTD 发明人 HISAMATSU NOBUO
分类号 G05B19/02;G05B19/04;H04Q9/02 主分类号 G05B19/02
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