| 摘要 |
PURPOSE:To provide higher resistance with a smaller area by forming a diffused layer with lower density which is different from well within the resisting region of the well. CONSTITUTION:A p-well p<+> layer 4 is formed on an n type Si substrate. Next an A region which is made to be highly resistant and an n<-> layer 5 in the region B of the off-set gate of an n-channel transistor Tr are formed, and an oxide film is caused to grow on them. Then patterning is added to the n<+> region of the oxide film. Furthermore, impurities are heat-diffused in the portion patterned to form a n<+> layer 6 which becomes the source-drain of the n channel Tr. This is followed by the removal of an gate oxide film and another oxide film for an electrode window region. After this, an opening for the window is made through photoetching. Electrode wiring 7 is made then. Resistance is made greater by inserting the n<-> layer 5 eliminating resistance in the p well region, so that greater resistance is available within a smaller area. |
