Teleprinter group terminal - has rapid clock rate FIFO serial buffer store for outgoing data blocks

摘要

The data transmission system has station connector modules (LAM) which each control the interface with a group of stations (T-80) having equal character transmission rates and where a microprocessor is provided for each station (MP1-MP80) whose contents are cyclically sampled by a counter (Cnt). During each sampling period, one of the microprocessors transfers its outgoing data rapidly to a serial buffer store (F1F02). The transmitting sampling enable logic is, however, not applied if there are no data waiting output from the microprocessor output line (CB1 to CB80) which is applied to a coordinator circuit (COn) from which AND gates (G2) are opened. The multiplexed addressing signals which the microprocessor separates from the data signals, are applied to a module bus line (BD2). The data signals move on the module bus line (BD1).