| 摘要 |
<p>Disclosed is a phase-controlled oscillator circuit which can compensate for interruptions in input timing pulses. The circuit comprises an oscillator which serves to emit timing pulses, a frequency divider arranged to frequency-divide the timing pulses to produce frequency-divided pulses, a phase comparator arranged to compare the phase of the frequency-divided pulses with the phase of synchronising pulses supplied thereto and to cause the frequency of the timing pulses emitted by the oscillator to be controlled in dependence upon the phase comparison result, and circuitry responsive to an interruption in the synchronising pulses to interrupt the supply of the frequency-divided pulses to the phase comparator for the duration of the interruption.</p> |
