DIGITAL MULTIFREQUENCY SIGNALLING RECEIVER

摘要

Disclosed is a digital multifrequency signalling receiving system in which a first operation device executes an operation to multiply multifrequency signals composed of N samples as input signals by a window function including coefficients required for fast Fourier transformation. An output produced at the first operation device, as a sample signal, is subjected to fast Fourier transformation at a second operation device which includes a subtractor and a logic circuit. In the subtractor, the sample signals are delayed ? samples to halve the number of sample signals. The logic circuit executes an operation for the sample signals, taking advantage of the fact that some frequencies of the outputs of the Fourier transformation are represented as the conjugate complex of the other outputs of the Fourier transformation. The sample signals fast-Fourier-transformed and produced at the second operation device are subjected to discrete Fourier transformation in a processor, where an output for detecting the multifrequency signals is obtained. .