发明名称 INTEGRATED CIRCUIT DEVICE
摘要 PURPOSE:To increase the density of an MOS IC and to enhance the performance thereof by arranging a conductive layer for decreasing the layer resistance of the source and drain regions on the surfaces of the regions. CONSTITUTION:Wiring layers 47, 48 pass over an MOS transistor Tr having source and drain regions 41, 42, a gate electrode 43, and pickup electrodes 44, 45, 46 from the regions 41, 42 and electrode 43. In the MOS Tr, conductive layers 49, 40 are formed and connected through penetrating holes to the regions 41, 42 respectively. The layer 49, 40 are arranged so as to decrease only the layer resistances of the regions 41, 42 different from the electrode wiring layer, and electrically connected to nowhere. With such a configuration, the source and drain layer resistances can be largely reduced to decrease the parasitic resistances remarkably, and the velocity of the IC and the power consumption can be greatly improved. Further, the widths of the source and the drain can be minimized, and the mounting density can be improved.
申请公布号 JPS56126969(A) 申请公布日期 1981.10.05
申请号 JP19800030523 申请日期 1980.03.11
申请人 TOKYO SHIBAURA ELECTRIC CO 发明人 OOUCHI KAZUNORI;OGURA ISAO;NATORI KENJI
分类号 H01L29/78;H01L21/82;H01L23/522;H01L23/535;H01L29/41;H01L29/417 主分类号 H01L29/78
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