发明名称 METHOD OF SYNCHRONIZING A QUADPHASE RECEIVER AND A CLOCK SYNCHRONIZATION DEVICE FOR CARRYING OUT THE METHOD
摘要 The invention relates to a method for the clock synchronization of a receiver for demodulating a quadphase coded data signal and to a clock synchronization device for carrying out the method. In the method according to the invention the first bit is compared (correlated) with the third bit and the second bit with the fourth bit: a high degree of correlation indicates that synchronization has been obtained and a low degree indicates absence of synchronization.
申请公布号 ZA8001058(B) 申请公布日期 1981.09.30
申请号 ZA19800001058 申请日期 1980.02.25
申请人 PHILIPS NV 发明人 DE JAGER F;VAN DOORN R;CARASSO M;VERBOOM J
分类号 H04L25/49;G11B20/14;H03M5/12;H04L7/00;H04L7/02;H04L7/027;H04L7/033;H04L25/48;H04L27/20 主分类号 H04L25/49
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