发明名称 DOUBLE INFORMATION PROCESSING EQUIPMENT
摘要 PURPOSE:To simplify a circuit configuration, decrease the number of component parts and raise the reliability of an equipment, by using a parity bit under the supervision of a double information processing equipment. CONSTITUTION:An input data which has been sent from the high rank equipment through the connection line 303 is provided to the first processing system 3 and the second processing system 4. The data which has been provided to said processing systems 3, 4 is processed by the respective processing circuits 101, 201, and after that, it is provided to the registers 103, 203 and the parity generating circuits 102, 202 through the connection lines 104, 204, respectively, a parity bit corresponding to a character of the data, etc. is generated by the circuits 102, 202 of the respective processing systems 3, 4, it is provided to the registers 103, 203 through the connection lines 106, 206, and the data which has been output by the registers 103, 203, and the parity bit are provided to the low rank equipment. And, the parity bit which has been generated by the circuits 102, 202 is supervised by the comparator circuit 302, by which the equipment constitution is simplified, the number of parts is decreased, and the reliability of the information processing equipment is raised.
申请公布号 JPS56124956(A) 申请公布日期 1981.09.30
申请号 JP19800028501 申请日期 1980.03.06
申请人 NIPPON ELECTRIC CO 发明人 NAKAI MASAAKI
分类号 G06F11/18;G06F11/16 主分类号 G06F11/18
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