发明名称 INFORMATION PROCESSING EQUIPMENT
摘要 PURPOSE:To execute a specific instruction without increasing a microprogram, by generating an interruption in the instruction executing procedure which has been stored in advance in a part of the main memory, when a specific instruction has been detected or when occuring of a specific event has been detected. CONSTITUTION:The main memory is logically divided into two, a memory address is assigned irrespectivey of its division, a regular software is stored in one divided area, a string of the specific instruction executing procedure is stored in the other divided area, and when a specific instruction is executed by the arithmetic unit or when a specific event has occurred, its state is detected and the gates 2, 3 are made on by the operand register. The FF 7 is set by outputs of said gates 2, 3, a hardware mode signal is made ''1'', and when the program interruption has occurred, a constant is input to the index register 5. Also, the contents of the boundary address are set to the base register 4, the contents of both the registers 4, 5 are added to the 3-input adder 6, and the executing procedure string of the specific instruction is accessed by a new address by the result of said addition.
申请公布号 JPS56124952(A) 申请公布日期 1981.09.30
申请号 JP19800020864 申请日期 1980.02.20
申请人 FUJITSU LTD 发明人 OINAGA YUUJI;MIYANO YOSHINOBU
分类号 G06F9/22;G06F9/30;G06F9/32;G06F9/48;G06F12/14 主分类号 G06F9/22
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