| 摘要 |
In this relaxation oscillator first and second electrically controlled constant current generators are used to provide proportionately related first and second currents to first and second terminals, respectively, between which the timing capacitor is connected. Set-reset, or R-S, flip-flop means is set and reset by the voltage at the first and second terminals, respectively, departing in a first sense from the voltage at a reference voltage bus by a predetermined amount. First switching means responds to the R-S flip-flop reset condition to complete a connection of the first terminal to the reference voltage bus and responds to the R-S flip-flop set condition to interrupt that connection. Second switching means responds to the R-S flip-flop set condition to complete a connection of the second terminal to the reference voltage bus and responds to the R-S flip-flop reset condition to interrupt that connection. The rate at which oscillations proceed is linearly related to the amplitudes of the proportionately related currents supplied by the first and second constant current generators.
|
