| 摘要 |
PURPOSE:To eliminate excessive busses, by causing the slave CPU to access the main memory by the main memory access instruction, which is read out from the main memory by the command from the master CPU, in the master slave system. CONSTITUTION:In case of data transfer between main memory 22 and internal memory 32 in the slave CPU, instructions including the main memory read instruction and the main memory write instruction for this data transfer stored in main memory 22 are read out to slave CPU21 by master CPU21. Slave CPU21 processes these instructions to access main memory 22 and executs data transfer between main memory 22 and internal memory 32. Consequently, even if the master CPU cannot access the internal memory of the slave CPU directly, the master CPU instructs data transfer between the internal memory of the slave CPU and the main memory without providing excessive address busses and data busses. |
