发明名称 |
Method of making an extremely low current load device for integrated circuit |
摘要 |
A MOSFET random access memory having an extremely low current load memory cell is disclosed. The memory cell comprises a cross-coupled binary stage in which one or more paths to ground can be selectively switched on or off through true and complement data nodes. Impedance means connect a power supply node to the data nodes for charging the data nodes to predetermined voltage levels. The impedance means comprise an intrinsic-extrinsic junction of a substantially pure, intrinsic semiconductor material and a diffusion of extrinsic conductivity impurities disposed within a region of the intrinsic semiconductor material. The impedance means is formed by an isoplanar silicon gate process as an integral portion of a polycrystalline silicon strip which interconnects the power supply node to a data node. A portion of the polycrystalline silicon strip is extended from the data node to form the gate of the transistor to which it is cross-coupled.
|
申请公布号 |
US4290185(A) |
申请公布日期 |
1981.09.22 |
申请号 |
US19790043420 |
申请日期 |
1979.05.29 |
申请人 |
MOSTEK CORPORATION |
发明人 |
MCKENNY, VERNON G.;CHAN, TSIU C. |
分类号 |
G11C11/412;H01L21/02;H01L21/3205;H01L21/3215;H01L23/522;H01L27/11;(IPC1-7):H01L21/00 |
主分类号 |
G11C11/412 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|