发明名称 MEMORY TESTER
摘要 PURPOSE:To perform memory testing easily and rapidly by making exclusive-OR processing of addresses and predetermined Hamming patterns and transmitting the testing addresses for Hamming distance. CONSTITUTION:The internal memory 6 of a memory tester 1 sets the predetermined addresses into an address register 4 according to the access from a control circuit 5, and sets a pattern 0001, etc. in a Hamming register 2. The addresses of the register 4 and register 2 and Hamming patterns are subjected to exclusive-OR processing in a Hamming address setting circuit 3 and are transmitted through a change-over circuit 7. Further, when the set patterns of the register 2 are successively shifted to 0010, 0100... etc., the addresses of the register 4 and the addresses of high error producing frequencies of Hamming distance are successively transmitted to the memory. The testing time for performing multiple times of reading by these easily formed addresses is reduced from the time corresponding to N<2> to the time corresponding to Nm. Here, N denotes the number of words, and m the number of bits of addresses.
申请公布号 JPS56119998(A) 申请公布日期 1981.09.19
申请号 JP19800023726 申请日期 1980.02.27
申请人 FUJITSU LTD 发明人 NAKAMURA KAN
分类号 G01R31/28;G11C29/10;G11C29/56 主分类号 G01R31/28
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