| 摘要 |
PURPOSE:To prevent decrease in the performance of a system by monitoring each address assigned at the refreshing operation, and performing rewriting when the address coinciding with an error address is assigned. CONSTITUTION:The line addresses transmitted in order to assign the respective locations which are being successively refreshed are monitored with a monitoring circuit 9, and when refreshed address coinciding with an error line address is detected, the circuit 9 transmits logic ''1'', and an output is obtained in an AND circuit 11, by which change-over circuits 7, 8 are changed over. The output of the circuit 11 is applied as a write instruction to a memory 1 via an OR circuit 13, and further the refreshing operation is temporarily stopped by way of an NOT circuit 14. The correcting data stored in a register 6 based on the write instruction by the operation of the circuit 11 are written in the location selected by the line addresses detected by the circuit 9 and the row addresses stored in the register 4. |
