发明名称 INTERFACE CIRCUIT FOR INPUT AND OUTPUT DEVICE
摘要 PURPOSE:To prevent the production of timing error due to the delay in operation at the data transfer between the central processing unit (CPU) and input and output device with the microprogram control. CONSTITUTION:When the microprogram control section 3 completes the specified data processing and sets FF4 and if FF5 is set in this case, the transfer-enable-signal is fed to the line 11 from the gate 6. The detection circuit 8 detects the transfer- enable-signal, and CPU1 arranges the data to be transferred and it is kept at the data buffer 10, and the data line 13 is electrically connected between CPU1 and interface circuit 2 to constitute the usable condition. Next, strobe signal is transmitted on the strobe signal line 12 from the strobe generating circuit 9, resulting that the data stored to the data buffer 10 is kept to the data buffer 7. FF5 is reset with the strobe signal, and the transfer enable signal from the gate 6 is stopped, the processing of microprogram is made to set FF4 and FF5.
申请公布号 JPS56118130(A) 申请公布日期 1981.09.17
申请号 JP19800021829 申请日期 1980.02.23
申请人 TOKYO SHIBAURA ELECTRIC CO 发明人 MAKINO TETSUO
分类号 G06F13/42 主分类号 G06F13/42
代理机构 代理人
主权项
地址