| 摘要 |
PURPOSE:To obtain the common storage device which can read out a plurality of data processors at the same time, by providing the packet memory with equal number of sets as that of data processors, and storing the same data to the same address of the packet memories. CONSTITUTION:Packet memories PM0-PM63 as the same sets of those of data processors PU0-PU63 are provided and the constitution is made that all the memories PM0-PM63 can store the same data to the same address. Further, the memories PM0-PM63 are provided with control sections PMC0-PMC63 and priority determining circuits PDL0-PDL63, memories PM0-PM63 are commonly connected to the packet memory bus PMBUS, and the memories PM0-PM63 are connected to operation sections CPU0-CPU63 of the devices PU0-PU63 via local buses LBUS0- LBUS63. Further, the data write-in and readout request from the devices PU0- PU63 is controlled at the same time with the control sections PMC0- PMC63 according to the output of the circuits PDL0-PDL63. |
