INTERRUPTION CONTROLLING SYSTEM FOR PERIPHERAL CONTROL CHIP OF MICROCOMPUTER

摘要

PURPOSE:To remarkably reduce the troublesomeness of procedure and the time required for it, by making the permission and dispermission of interruption to all the functional blocks in the chip at a bundle and enabling the retrieval of interruption request at a bundle. CONSTITUTION:In a peripheral chip, status control registers 1-7, interruption permission register 8 and interruPtion request register 9 are provided. The specific address is assigned to the registers with the address decoder 10, and each bit in the registers is operated and retrieved at a bundle from the computer side through the data bus 11 and the internal data bus 12.