发明名称 DIFFERENTIATION CIRCUIT
摘要 PURPOSE:To enable the measurement less in the change to time and good in the accuracy of integrating value of electric signal, by setting the time interval of the operation signal of up-down counter smaller when the rate of change to time is greater and greater when it is smaller. CONSTITUTION:The set value 5a of a timing logic circuit 5 is set longer to the signal less in the rate of change. The DC signal voltage in 1 volt input from the input terminal IN is converted into 1kHz at the voltage-frequency converter 1, frequency-divided into 1/10 at the frequency divider 2 adjusted corresponding to the circuit 5, and input to the up-down counter 3. Since the time interval is set to 10sec in the counter 3, the output pulse of the frequency divider 2 is counted down for 10sec and counted up for 10sec. Thus, the digital value corresponding to average differentiation value of DC voltage for 20sec is output from the output terminal of the counter 3 and measured at the display device connected to the output terminal OUT and stored to the latch circuit 4. Noise mixed with a given phase is rejected at the gate 6. Further, the D/A converter 7 enables analog output.
申请公布号 JPS56118173(A) 申请公布日期 1981.09.17
申请号 JP19800021633 申请日期 1980.02.25
申请人 SHINKU RIKO KK 发明人 KATOU RIYOUZOU
分类号 G06F7/64;G06F17/40;G06G7/18 主分类号 G06F7/64
代理机构 代理人
主权项
地址