| 摘要 |
PURPOSE:To secure a data holding function with a simple constitution for a time- division type D-A converter, by using a signal generating circuit, a selection circuit, a shift register and an AND circuit each. CONSTITUTION:The control circuit 2 which uses the oscillation pulse supplied from the pulse oscillator 1 for the input delivers alternately the clock signal A that defines n pieces of pulses generated with the time intervals of geometric progression as a period and the 1st pulse signal B generated after the signal A. At the same time, the 2nd pulse signal C is delivered as an on signal while the signal A is delivered. The shift register 3 which uses the n-bit data given from outside for the parallel input feeds the serial output back to the serial input and at the same time supplies the clock signal A as a shift register. The selection circuit 4 which uses the pulse signal B for the input generates the selection signal E only when tne pulse B is supplied under the conditions of the external signal D, and thus the register 3 reads the data of n-bits in parallel. The AND gate 5 delivers the serial output as it is to the integral network 6 while the pulse signal C is delivered and then converts the serial output into an analog signal. |
