发明名称 FAILURE MONITOR SYSTEM
摘要 PURPOSE:To reduce the burden of the main station and to increase the transmission efficiency, by refreshing the monitor timer of the station itself, when no transmission error is absent, even if the address of received telegraphic message is not corresponded to the address of the station of itself, in monitoring the failure of the main station from the slave station. CONSTITUTION:The main station and a plurality of slave stations 2-1-2-n are connected with multidrop lines 3, 4, telegraphic message is transmitted on the line 3 from the master station 1, and the telegraphic message from the slave stations 2-1-2-n corresponding to the address transmitted on the line 4 is received with the master station 1. The slave stations 2-1-2-n are provided with a monitor timer 30, and this timer 30 is reset in the waiting state where the telegraphic message is received. Further, when the reception of message is finished at the transmission/reception circuit 10, the interruption signal is fed the microprocessor CPU20, where the presence of transmission error of the received message is inspected. Further, if no transmission error is present, the timer 30 is refreshed independently that the address of message is corresponded to the address of the station itself, and the master station 1 is abnormal when the timer 30 is in time-over.
申请公布号 JPS56116354(A) 申请公布日期 1981.09.12
申请号 JP19800019919 申请日期 1980.02.19
申请人 OMRON TATEISI ELECTRONICS CO 发明人 HASHIMOTO RITSUO
分类号 H04L29/14;H04L1/00 主分类号 H04L29/14
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