发明名称 Integrated filter circuit for clocked sampling periods - uses minimum substrate area by charging capacitors in series parallel via operational amplifiers
摘要 <p>The required substrate area in this integrated filter circuit is reduced by using equivalent circuits resulting in minimising capacities, the circuit consisting of switches, capacitors and one or more operational amplifiers. Compensation is effected by switching in parallel to an uncharged capacitor (C1) of two series connected charged capacitors (C2v, C'2v), with a further charged capacitor (C1) being connected in series. The voltage developed after a series of n-stages by a filter of the m'th order is given by y(n) which is the sum from nu equals 0 to m of terms a(nu)x(n-nu) plus the sum from nu equals 1 to m of terms b(nu)y(n-nu), where (a,b) are filter coefficients and (x,y) are input and output voltages.</p>
申请公布号 DE3007846(A1) 申请公布日期 1981.09.10
申请号 DE19803007846 申请日期 1980.02.29
申请人 SIEMENS AG 发明人 LUEDER,ERNST,PROF.DR.-ING.HABIL.
分类号 H03H19/00;(IPC1-7):03H19/00 主分类号 H03H19/00
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