发明名称 MANUFACTURE OF TWIN GATE FET
摘要 PURPOSE:To contrive to reduce an auto-bias effect by a method wherein the first gate electrode metal is applied an selected etching by using a photoresist and a second gate electrode metal is formed adjacently to the 1st gate electrode metal with a mask material of the photoresist or the like as an unbrella. CONSTITUTION:The first gate electrode metal 31 is evaporation-formed on the whole surface of a mesa-cut semiconductor wafer and then, a metal 31 is evaporation-formed, on which the photoresist 32 is patterned as prescribed. In the following, the metal 31 is applied to selected etching with the resist 32 as the mask to permit the second gate metal 33 to be evaporated on the whole surface. And then, the resist 32 is peeled off to allow a pattern for forming the gate electrodes to be formed on the metals 31 and 33 with the photoresist 34. Then, unnecessary parts of the metals 31 and 33 are removed by etching with the resist 34 as the mask to obtain gate electrodes 35, 36. Whereby the first and second gate electrodes become possible to be formed at the positions adjacent as near as the FET is not interferred with the actions and the autobias effect can be contrived to be reduced.
申请公布号 JPS56114377(A) 申请公布日期 1981.09.08
申请号 JP19800016846 申请日期 1980.02.14
申请人 NIPPON ELECTRIC CO 发明人 YAMAMOTO RIYUUICHIROU
分类号 H01L29/80;H01L21/28;H01L29/417;H01L29/812 主分类号 H01L29/80
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