| 摘要 |
<p>PURPOSE:To reduce the number of pins when the internal devices are formed into an LSI, by unifying the basic clock signal and the system initialization signal via an external control circuit and separating the output of the control circuit to both signals via an internal device. CONSTITUTION:The basic clock signal generator 11 and the system initialization signal generator 12 are provided externally to the internal device 16 that performs an logic operation. At the same time, the control circuit 14 is provided externally to unify the basic clock signal and the system initialization signal. Then the output of the circuit 14 is transmitted to the device 16 through a piece of interface line 15, and both the basic clock signal and the system initialization signal are generated separately within the device 16. For instance, the pulse duration is detected in the device 16 via the gate 17, delay circuit 18 plus FF19, and then the system initialization signal (d) is generated separately from the FF19. At the same time, the basic clock signal (e) is generated via the inhibition gate 20.</p> |
