发明名称 DEMODULATING CIRCUIT FOR SYNCHRONOUS DATA TRANSMISSION
摘要 PURPOSE:To enable to regenerate a demodulated signal superior in tolerance to noises, by permitting a transmitted signal to include timing information which synchronizes with a modulated signal. CONSTITUTION:A differentially four-phase-modulated signal inputted from input terminal IN is distributed to multiplying circuits MUL1 and MUL2, demodulated carrier regenerating circuit CAR and timing extracting circuit TIM via amplifying circuit AMP. Outputs of multiplying circuits MUL1 and MUL2 are inputted to demodlulating circuits DEM1 and DEM2, whose outputs are supplied to sampling circuits SPL1 and SPL2. The outputs of sampling circuits SPL1 and SPL2 are inputted to code converting circuit CNV, which outputs the origianl data from output terminal OUT.
申请公布号 JPS56111359(A) 申请公布日期 1981.09.03
申请号 JP19800014225 申请日期 1980.02.07
申请人 NIPPON ELECTRIC CO 发明人 SHIBAZAKI ETSUO
分类号 H04L27/22;H04L27/18;H04L27/227 主分类号 H04L27/22
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