| 摘要 |
PURPOSE:To detect arrival of a desired frequency accurately by applying an input signal to a digital filter and by detecting its frequency. CONSTITUTION:With clock 55 obtained by dividing the period of queuing frequency f0 into six phases, shift register 57 reads input signal 56 converted into codes ''1'' and ''0''. In D type F-Fs 60-65, [000111] is set and when this set value coincides with the contents of register 57, the output of gate 72 is generated to open gate 73. Consequently, while n-bit counter 74 starts counting, values of D type F-Fs 60-65 circulate. Therefore, as far as input signal 56 has the periodicity of [000111], counter 74 continues counting operation and when it goes up to n-bits, R-S type F-F75 is set, thereby detecting arrival of a desired frequency. |
