| 摘要 |
<p>An interface (214, 215, 216) between a microprocessor chip (200) and input/output, and memory modules. The interface uses a single, bidirectional bus (214) comprised of a number of lines which is less than the number necessary to carry a complete address word or a full width data word. Information transfer is effected by transferring information in small portions utilizing two or more interface clock cycles. An encoded control specification placed on the bus (214) during the first cycle of information transfer specifies the type of access, the direction of transfer, and the length (number of bytes) of data to be moved. Two additional simplex lines, ISA (215) from the microprocessor and ISB (216) to the microprocessor are needed to complete the basic interface. </p> |
