| 摘要 |
PURPOSE:To establish the semiconductor storage device possible for high speed operation and smalls-sized chip, by introducing the specified signal line of ROMs alternately from the opposing direction provided with IGFETs in XY matrix arrangement. CONSTITUTION:The signal output lines X0, X1... from X decoders 3a, 3b to the row of IGFETs 2... in matrix arrangement forming a ROM1 are introduced to ROM1 from the direction opposing left and right alternately, and the interval L between rows adjacent of common parts 80... having broader wdith duplicated with the metallic wirings 60 being the gate wirings of ROM1 and with the diffusion wirings 50..., is greater than the case of introduction from the same direction of the output lines X0.... Thus, even with decreased interval l between the wirings 60..., the interval L is more than the minimum interval, allowing to reduce the chip size and the capacity of each FET in the ROM1, resulting that the time constant at electric charge discharge is small. Thus the storage device with high speed operation can be made. |
