发明名称 TIME SLOT REPLACEMENT SYSTEM
摘要 PURPOSE:To realize a miniaturization of a device, by storing the number of output terminal corresponding to each time slot and at the memory position of an address that corresponds to the input terminal of a multiplexing circuit in each region of the time slot conversion memory and thus realizing an isolation of the output of a buffer memory just through a time slot conversion. CONSTITUTION:The frame synchronous circuit 16 has a synchronism with the output of te serial-parallel conversion circuit 3. In addition, the time slot counter 18 that uses the address signal as the input is provided along with the frame counter 17. Then the F bits of the signal applied to the input terminal 1-N is applied to the circuit 16 to secure a frame synchronizm for the multiplexing signal. After this, the counter 17 is set synchronizing with the time slot of the multiplexing signal to transmit an output. When the output of the counter 17 is at the address of the terminal 1-N at the F-bit position, the output is switched by a switch circuit from the counter 18 to be applied to the buffer memory 4.
申请公布号 JPS56110398(A) 申请公布日期 1981.09.01
申请号 JP19800012821 申请日期 1980.02.04
申请人 NIPPON ELECTRIC CO;NIPPON TELEGRAPH & TELEPHONE 发明人 KUBOTA YUUJI;KIHARA KUNIAKI;KAKINO TAKESHI;KOBAYASHI MASAKI
分类号 H04J3/00;H04Q11/04 主分类号 H04J3/00
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