| 摘要 |
PURPOSE:To increase gate sensitivity without spoiling a high dv/dt equivalent value by providing a mechanism which does not cause an amplification action to an overcurrent, on a transistor capable of increasing the gate sensitivity of PNPN element. CONSTITUTION:An anode region 32, a P gate region 33 and a phototransistor base region 34 are formed on a N type semiconductor substrate 31. In addition, an N type diffusion region 35-38 and a high resistance N layer 60, 61 are formed. An N type multicrystal silicon 47, 48, 54, 55 is formed through the intermediary of an insulation layer 44, 46. In this manner, MOSFET35, 36, 47 and 37, 38, 54 and a photo NPN transistor 37, 34, 31 are constituted. An anode electrode 31 and an MOSFET gate electrode 50, 57 are connected together by means of wiring. Also an emitter electrode 58 and a P gate electrode 53 are connected in the same way. The polycrystalline silicon 48, 66 serve as a resistor and a capacitor is formed above and below the polycrystalline layer. It is possible to increase the gate sensitivity without spoiling the high dv/dt equivalent value through selection of the above-mentioned value. |
