| 摘要 |
The bit density of stored information in a read-only memory (ROM) can be substantially increased by increasing the number of bits which can be stored in each memory cell. This can be accomplished without increasing the size or complexity of the memory cell by having the read only memory capacity stored in each memory cell as one of a multiple number of discrete states achievable by the cell. In a semiconductor chip this can be accomplished by having the semiconductor element, such as a transistor, capable of assuming one of a multiple of parametric values or states. For example, as described herein, impedance or cell width of a semiconductor transistor can be varied to assume one of four different states. The state assigned to a selected memory cell is bracketed by the value of the outputs of a plurality of comparator circuits coupled thereto. The outputs of the comparator circuits are then analyzed by a logic circuit to provide the appropriate binary readout representative of the parametric state of the selected cell.
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