| 摘要 |
In an adaptive delta modulation system, the delta modulated output signal is applied to a logic circuit which derives from such signal a pulse train used to develop the system's quantization step-size control voltage. The output pulse train of the logic circuit is applied to a circuit which serves the function of an integrator although digital in operation. The digital circuit develops a digital output signal whose value depends upon the number of pulses appearing per unit time in the logic circuit output pulse train. The digital circuit includes a forwards-backwards counter, whose forwards input receives the logic circuit output pulse train. An accumulator which accumulates the count on the counter produces carry pulses at its highest-place stage, the carry pulses having a repetition frequency corresponding to the count on the counter, the carry pulses being applied to the reverse input of the counter. The count on the counter corresponds to the number of pulses appearing per unit time in the logic circuit output pulse train and is applied to a digital-to-analog converter, from the analog output signal of which the quantization step-size control voltage is derived.
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