发明名称 |
SEMICONDUCTOR MEMORY DEVICE |
摘要 |
PURPOSE:To increase a charge accumulated in a memory unit and stabilize memory action by providing a circuit to generate a cell plate voltage which is higher than a power supply voltage. CONSTITUTION:A memory cell plate 3 is formed as a metal electrode through a thin insulation film 2 on a semiconductor substrate 1, so that a memory cell of MIS structure is constituted. A diffusion layer 6 connected to a word line 4 and a bit line 5 composes an MIS transistor Q1. Then a cell plate voltage generating circuit 7 which generates a voltage which is higher than a power supply voltage VDD supplied to this unit is provided on a semiconductor chip constituting the unit and the same chip, and an output voltage from the circuit 7 is applied to a memory cell plate 3. Consequently, the amplitude range of a bit line which is effective for the control of a charge accumulated in a memory cell is extended and the maximum accumulated charge is increased. |
申请公布号 |
JPS56110252(A) |
申请公布日期 |
1981.09.01 |
申请号 |
JP19800012857 |
申请日期 |
1980.02.05 |
申请人 |
NIPPON TELEGRAPH & TELEPHONE |
发明人 |
WATANABE TAKASHI;MANO TSUNEO;INOUE JIYUNICHI |
分类号 |
G05F3/20;G11C5/00;G11C11/404;G11C11/4074;H01L21/822;H01L21/8242;H01L27/04;H01L27/10;H01L27/108;H01L29/78 |
主分类号 |
G05F3/20 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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