Phase locked loop out-of-lock detector

摘要

The out-of-lock condition of a digital phase locked loop is detected during a plurality of states such that single bit discrepancies, such as a noise pulse, are ignored, and thus the tolerable range of phase detection error is broadened. The present invention is adaptable for use with typical applications of digital phase locked loops, and can be used to control the phase detector of the digital phase locked loop such that error voltages will be introduced into the loop only during selected states.