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发明名称
摘要
PURPOSE:To correct the capacity unbalance between the high-speed reading and ordinary-speed reading action times by providing FET, which is controlled by the row detection decoder, between the output line and the common output line.
申请公布号
JPS5636515(B2)
申请公布日期
1981.08.25
申请号
JP19760099721
申请日期
1976.08.23
申请人
发明人
分类号
G11C11/419;G11C7/06
主分类号
G11C11/419
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代理人
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