| 摘要 |
Disclosed is a MIS type semiconductor device in which a source and a drain layer are selectively formed in a surface of a semiconductor substrate while a gate electrode is formed over a channel region between the source layer and the drain layer in the substrate surface through an interposed gate insulating film, wherein the semiconductor substrate is formed with selectively buried insulation films between the source and drain layers and the channel portion in thickness greater than that of the gate insulating film and further under the selected insulating films formed with a first region of the same conduction type as that of the source layer insulating for connecting the channel portion and the source layer to each other and with a second region of the same conduction type as that of the drain layer for connecting the drain layer and the channel portion to each other, the second region having an impurity concentration greater than that of the drain region, and the gate electrode is formed as extending over the selected insulating films. The second region underlying the selectively buried thick film functions as a saturatable resistance element to increase the voltage which the device can withstand. The channel length is unvariably determined by the distance between the first and the second region. No dielectric breakdown will occur at the end portions of the gate electrode extending over the selective insulating films.
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