发明名称 SEMICONDUCTOR MEMORY DEVICE
摘要 PURPOSE:To obtain the memory device of a high-speed operation and low power consumption, by storing the bit line potential after sensing into the capacity and by driving the bit line charging transistor by the bootstrap effect. CONSTITUTION:After precharge transistors Q13 and Q16 are turned on to precharge transistors Q11 and Q12 for latch and the bit line, transistor Q19 is turned on to perform the sense operation. Next, when transistors Q17 and Q18 connected to the bit line are turned on, a part of charge of the bit line is distributed again to capacitors C1 and C2, and the charge potential corresponds to each bit line potential. Consequently, when transistors Q17 and Q18 are cut off, transistors Q15 and Q16 parallel with transistors Q13 and Q14 are controlled by the bootstral effects corresponding to photoelectric potentials of capacitors C1 and C2 to promote recharging of the high-potential bit line, and thus, the semiconductor memory device of a high-speed operation and low power consumption is obtained where the current is almost flowed to the low-potential bit line.
申请公布号 JPS56105390(A) 申请公布日期 1981.08.21
申请号 JP19800006013 申请日期 1980.01.22
申请人 FUJITSU LTD 发明人 TAGUCHI MASAO
分类号 G11C11/409;G11C11/4094 主分类号 G11C11/409
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