| 摘要 |
<p>PURPOSE:To execute the write and the test simultaneously witg one set of devices, by using the address pattern generator and the write condition generating circuit of the IC memory test system to write data into the ROM and by using only the addres pattern generator to perform the test. CONSTITUTION:The address signal from address pattern generator 2 of IC memory test system 1 is applied to ICROM7, where the write state is selected through write condition generating circuit 6, to write information of RAM4. Next, when circuit 6 is turned off through switching circuit 5 of the system and the address signal from generator 2 is applied, corresponding written information of ROM7 is read out and is compared with storage information of RAM4 by deciding circuit 3 to test ROM7. Consequently, the write and the test of the ROM are executed simultaneously simply and rapidly by one set of the test system.</p> |
