| 摘要 |
<p>Malfunctions of a copying machine are lagged in an exception counter (19). At the end of a predetermined number of command pulses, defined by the content of a limit register (20), a comparator (12) provides an output signal to enable AND gates (17) and (18). During the occurrence of the command pulse sequence, error signals are counted by error counter (14), and if, at the end of the sequence, the count is greater than or equal to a count in a criteria register (15) then the exception counter is incremented. Otherwise, the exception counter is reset. Thus, after a number of successive command pulse sequences, the exception counter records persistent malfunctions only. The system may be incorporated in a microprocessor system using defined registers to hold the counts and effect comparisons. </p> |
