| 摘要 |
PURPOSE:To make a wiring capacity small by providing p type region on n type Si substrate, forming a depletion layer and forming a wiring layer on a substrate surface on the depletion layer through an insulating film. CONSTITUTION:p<->-Wells 7 are formed in the n<-> type Si substrate 6 applied a positive substrate potential. Elements of MIS transistor and the like composed of n<+> layer 8 are formed in the p<->-wells 7. The p<->-wells 7 are separated each in a region where the wiring 9 is formed, and the depletion layer 10 extends to the n<-> type substrate side in the region. If an interval between the wells is narrow, the whole separated region tends to be depleted and the depletion layer thickness (d) viewed from the substrate surface is made more than the depth of the well. Accordingly, the wiring capacity decreases in large without making the SiO2 film 11 thick, because the capacity of the depletion layer is small to the extreme out of the composite capacity of the capacity of the film 11 and that of the depletion layer. Accordingly, high speed operations are made practicable. |
