| 摘要 |
PURPOSE:To obtain an input circuit for a watch which are strong to chattering by controlling a prestage input circuit to which a switch input is applied by two clock signals in a deviated phase and synchronizing a post-stage input circuit by a clock signal delayed than the above-mentioned signal. CONSTITUTION:A prestage input circuit to which a switch SW is inputted is constituted of an RS-FF 11, and a D-FF 12, and the two clock signals CL1, CL2 in a different phase formed by a clock signal generating circuit 2 are inputted to each FF. Further, the output of the D-FF 12 is inputted to the post-stage input circuit 1' consisting of an RS-FF 14 and a D-FF 15. The output of the D-FF 15, the clock signal and the output CL3 of an NOR gate 24 to which the inversion output of the CL1 is inputted are inputted to the reset signal of the RS-FF 14 and the clock CL4 delayed from CL1-CL3 is inputted to the D-FF. With such constitution, the chattering signal of the period shorter than the CL1 is not read in and the reset of the RS-FF 14 is delayed from that of the CL4; therefore, the signal of the switch SW is surely outputted. |
