| 摘要 |
<p>???????? FOR A DATA PROCESSING SYSTEM There is disclosed a scheme for providing hidden memory refresh for a data processing system. The data processing system employs a CPU and a MOS memory, the memory requiring replenishing or refreshing periodically. The CPU includes microcode containing microinstructions, the microinstructions providing control for the CPU including control for the memory. The refreshing scheme employs apparatus for decoding of these microinstructions and for providing refreshing signals to the memory in such a manner that all non-refreshing operations of the data processing system proceed without being delayed by operation of the refreshing apparatus.</p> |
